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Updated at 26/10/2025 10:30:15(UTC+8)

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Description

The MC14044BDG is a quad R-S Latch constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three-state buffers having a common enable input. The outputs are enabled with a logical 1 or high on the enable input, a logical 0 or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs. The outputs are capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range. This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
Double diode input protection
Three-state outputs with common enable
Precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit.

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MC14044BDG Specifications

Attribute	Attribute Value

Datasheet	Datasheet
3D Model	3D Model
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC-16
Supply Voltage (DC)	3.00V (min)
Capacitance	7.5 pF
Halogen Free Status	Halogen Free
Number of Outputs	4 Output
Output Current	8.8 mA
Number of Circuits	4 Circuit
Number of Positions	16 Position
Number of Bits	4 Bit
Polarity	Non-Inverting
Power Dissipation	500 mW
Quiescent Current	4 µA
Number of Gates	4 Gate
Number of Inputs	8 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 18V
Supply Voltage (Max)	18 V
Supply Voltage (Min)	3 V
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Size-Length	10 mm
Size-Width	4 mm
Size-Height	1.5 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2017/07/07
ECCN Code	EAR99

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