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Updated at 17/06/2025 10:30:15(UTC+8)
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Description
- Introduction
- The Intel® 82541(PI/GI/EI) Gigabit Ethernet is a single, compact component with an integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) functions. For desktop, workstation and mobile PC Network designs with critical space constraints, the Intel® 82541(PI/GI/EI) allows for a Gigabit Ethernet implementation in a very small area that is footprint compatible with current generation 10/100 Mbps Fast Ethernet designs.
- Product Features
- ■ PCI Bus
- — PCI revision 2.3, 32-bit, 33/66 MHz
- — Algorithms that optimally use advanced PCI MWI, MRM, and MRL commands
- — CLK_RUN# signal
- — 3.3 V (5 V tolerant PCI signaling)
- ■ MAC Specific
- — Low-latency transmit and receive queues
- — IEEE 802.3x-compliant flow-control support with software-controllable thresholds
- — Caches up to 64 packet descriptors in a single burst
- — Programmable host memory receive buffers (256 B to 16 KB) and cache line size (16 B to 256 B)
- — Wide, optimized internal data path architecture
- — 64 KB configurable Transmit and Receive FIFO buffers
- ■ PHY Specific
- — Integrated for 10/100/1000 Mb/s full- and half-duplex operation
- — IEEE 802.3ab Auto-Negotiation and PHY compliance and compatibility
- — State-of-the-art DSP architecture implements digital adaptive equalization, echo and cross talk cancellation
- — Automatic polarity detection
- — Automatic detection of cable lengths and MDI vs. MDI-X cable at all speeds
- ■ Host Off-Loading
- — Transmit and receive IP, TCP, and UDP checksum off-loading capabilities
- — Transmit TCP segmentation and advanced packed filtering
- — IEEE 802.1Q VLAN tag insertion and stripping and packet filtering for up to 4096 VLAN tags
- — Jumbo frame support up to 16 KB
- — Intelligent Interrupt generation (multiple packets per interrupt)
- ■ Manageability
- — On-chip SMBus 2.0 port
- — ASF 1.0 and 2.0
- — Compliance with PCI Power Management v1.1/ACPI v2.0
- — Wake on LAN(WoL) support
- — Smart Power Down mode when no signal is detected on the wire
- — Power Save mode switches link speed from 1000 Mb/s down to 10 or 100 Mb/s when on battery power
- ■ Additional Device
- — Four programmable LED outputs
- — On-chip power regulator control circuitry
- — BIOS LAN Disable pin
- — JTAG (IEEE 1149.1) Test Access Port built in silicon (3.3 V, 5 V tolerant PCI signaling)
82541PI Specifications
| Attribute | Attribute Value |
|---|---|
| Datasheet | Datasheet |
| 3D Model | 3D Model |
| Show | |
| RoHS | RoHS Compliant |
Order guide
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- Please confirm with the logistics company in advance for remote areas.
(Additional charges ($35-$50) may apply for delivery in these areas)
- Delivery date: usually 2 to 7 working days.
- A tracking number will be sent after your order ships.
- - Carefully inspected and packed by ManyChip warehouse - Vacuum packaging - Anti-static packaging - Shockproof foam
- The terms here are for reference only, the actual terms are subject to the sales quotation. - Please confirm product specifications when ordering. - MOQ refers to the minimum order quantity required to purchase each part. - If you have special ordering instructions, please indicate them on the ordering page. - Inspection (PSI) will be performed prior to shipment.
- - Income Quality Control (IQC), 1000+ qualified dealers. - Chips are tested by authoritative organizations to ensure the quality, authenticity and safety of your device. - Decapsulation control - X-ray control - XRF inspection - Electrical testing - Surface testing -Digital components warehouse, covering an area of 800 square meters, with constant temperature and humidity
Contact Us
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