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Updated at 17/06/2025 10:30:15(UTC+8)

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Description

The ADCLK846BCPZ is a 12-output low-power clock Fan-out Buffer optimized for low jitter and low power operation. Possible configurations range from 6 LVDS to 12 CMOS outputs, including combinations of LVDS and CMOS outputs. Two control lines are used to determine whether fixed blocks of outputs are LVDS or CMOS outputs. The clock input accepts various types of single-ended and differential logic levels including LVPECL, LVDS, HSTL, CML and CMOS.
Pin-programmable control
Sleep mode
54fs Integrated jitter (12kHz to 20MHz)
100fs Additive broadband jitter
2ns Propagation delay (LVDS)
135ps Output rise/fall (LVDS)
65ps Output-to-output skew (LVDS)

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ADCLK846BCPZ Specifications

Attribute	Attribute Value

Datasheet	Datasheet
3D Model	3D Model
Mounting Style	Surface Mount
Number of Pins	24 Pin
Case/Package	LFCSP-24
Frequency	1.2 GHz
Supply Voltage (DC)	1.71V (min)
Number of Outputs	6 Output
Number of Circuits	1 Circuit
Number of Positions	24 Position
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.71V ~ 1.89V
Supply Voltage (Max)	1.89 V
Supply Voltage (Min)	1.71 V
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Size-Length	4 mm
Size-Width	4 mm
Size-Height	0.83 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

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