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Updated at 17/06/2025 10:30:15(UTC+8)

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Description

N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild"s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Industry standard outline SOT-23 surface mount package using proprietary SuperSOT TM-3 design for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON).Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface mount

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NDS351N Specifications

Attribute	Attribute Value

Datasheet	Datasheet
3D Model	3D Model
Mounting Style	Surface Mount
Number of Pins	3 Pin
Case/Package	SOT-23-3
Voltage Rating (DC)	30.0 V
Current Rating	1.10 A
Polarity	N-CH
Power Dissipation	0.5 W
Drain to Source Voltage (Vds)	30 V
Continuous Drain Current (Ids)	1.10 A
Rise Time	16 ns
Input Capacitance (Ciss)	140pF @10V(Vds)
Input Power (Max)	460 mW
Fall Time	16 ns
Operating Temperature (Max)	150 ℃
Operating Temperature (Min)	-55 ℃
Power Dissipation (Max)	500mW (Ta)
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Size-Length	2.9 mm
Size-Width	1.4 mm
Size-Height	1.12 mm
Operating Temperature	-55℃ ~ 150℃ (TJ)
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	Non-Compliant
Lead-Free Status	Contains Lead

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- Vacuum packaging
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