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Updated at 12/07/2025 10:30:15(UTC+8)
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Description
- Product Details
- ### For a limited time, take a live test drive of the AD6676 by using our remote evaluation software.
- The AD6676 is a highly integrated IF subsystem that can digitize radio frequency (RF) bands up to 160 MHz in width centered on an intermediate frequency (IF) of 70 MHz to 450 MHz. Unlike traditional Nyquist IF sampling ADCs, the AD6676 relies on a tunable band-pass Σ-Δ ADC with a high oversampling ratio to eliminate the need for band specific IF SAW filters and gain stages, resulting in significant simplification of the wideband radio receiver architecture. On-chip quadrature digital downconversion followed by selectable decimation filters reduces the complex data rate to a manageable rate between 62.5 MSPS to 266.7 MSPS. The 16-bit complex output data is transferred to the host via a single or dual lane JESD204B interface supporting line rates of up to 5.333 Gbps.
- Applications
- Wideband cellular infrastructure equipment and repeaters
- Point-to-point microwave equipment
- Instrumentation
- Spectrum and communication analyzers
- Software defined radio
- ### Features and Benefits
- High instantaneous dynamic range
- Noise figure (NF) as low as 13 dB
- Noise spectral density (NSD) as low as −159 dBFS/Hz
- IIP3 up to 36.9 dBm with spurious tones <−99 dBFS
- Tunable band-pass Σ-Δ analog-to-digital converter (ADC)
- 20 MHz to 160 MHz signal bandwidth
- 70 MHz to 450 MHz IF center frequency
- Configurable input full-scale level of −2 dBm to −14 dBm
- Easy to drive resistive IF input
- Gain flatness of 1 dB with under 0.5 dB out-of-band peaking
- Alias rejection greater than 50 dB
- 2.0 GSPS to 3.2 GSPS ADC clock rate
- On-chip PLL clock multiplier
- 16-bit I/Q rate up to 266 MSPS
- On-chip digital signal processing
- NCO and quadrature digital downconverter (QDDC)
- Selectable decimation factor of 12, 16, 24, and 32
- Automatic gain control (AGC) support
- On-chip attenuator with 27 dB span in 1 dB steps
- Fast attenuator control via configurable AGC data port
- Peak detection flags with programmable thresholds
- Single or dual lane, JESD204B capable
- Low power consumption: 1.20 W
- 1.1 V and 2.5 V supply voltage
- TDD power saving up to 60%
- 4.3 mm × 5.0 mm WLCSP
AD6676 Specifications
| Attribute | Attribute Value |
|---|---|
| Datasheet | Datasheet |
| 3D Model | 3D Model |
| Show | |
| Product Lifecycle Status | Recommended for New Designs |
Order guide
-
TT in advance (bank transfer), Western Union, Credit card,
PayPal. Customer is responsible for shipping fee, bank
charges, duties and taxes.
-
- You can choose whether shipping charges will be charged through your shipping account or by us.
- Please confirm with the logistics company in advance for remote areas.
(Additional charges ($35-$50) may apply for delivery in these areas)
- Delivery date: usually 2 to 7 working days.
- A tracking number will be sent after your order ships.
- - Carefully inspected and packed by ManyChip warehouse - Vacuum packaging - Anti-static packaging - Shockproof foam
- The terms here are for reference only, the actual terms are subject to the sales quotation. - Please confirm product specifications when ordering. - MOQ refers to the minimum order quantity required to purchase each part. - If you have special ordering instructions, please indicate them on the ordering page. - Inspection (PSI) will be performed prior to shipment.
- - Income Quality Control (IQC), 1000+ qualified dealers. - Chips are tested by authoritative organizations to ensure the quality, authenticity and safety of your device. - Decapsulation control - X-ray control - XRF inspection - Electrical testing - Surface testing -Digital components warehouse, covering an area of 800 square meters, with constant temperature and humidity
Contact Us
If you have any problem,please email to sales@manychip.com, we will response as soon as possisble.
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