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- TMS320C6713BGDP300 - TI
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Manufacturer:TI
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ManyChip's Part#:MC4146778
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Category:DSP, Digital Signal Processor
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Package:BGA-272
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Datasheet:Datasheet 3D Model
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Description:Digital Signal Processing (DSP) Floating-Point 32Bit 300MHz 2400MIPS 272Pin BGA
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Stock Locations:
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Availability:296 pcs In Stock
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MOQ:1 pcs
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Unit Price:$ 48.28
Updated at 01/11/2025 10:30:15(UTC+8)
Certifications
ManyChip is committed to product quality and safety with ISO 9001, ISO 13485, ISO 45001, UL, RoHS, CQC and REACH certifications.
Description
- The TMS320C67x DSPs (including the TMS320C6713B device) compose the floating-point DSP generation in the TMS320C6000 DSP platform. The C6713B device is based on the high-performance, advanced very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and multifunction applications.
- Operating at 225 MHz, the C6713B delivers up to 1350 million floating-point operations per second (MFLOPS), 1800 million instructions per second (MIPS), and with dual fixed-/floating-point multipliers up to 450 million multiply-accumulate operations per second (MMACS).
- Operating at 300 MHz, the C6713B delivers up to 1800 million floating-point operations per second (MFLOPS), 2400 million instructions per second (MIPS), and with dual fixed-/floating-point multipliers up to 600 million multiply-accumulate operations per second (MMACS).
- The C6713B uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The Level 1 program cache (L1P) is a 4K-byte direct-mapped cache and the Level 1 data cache (L1D) is a 4K-byte 2-way set-associative cache. The Level 2 memory/cache (L2) consists of a 256K-byte memory space that is shared between program and data space. 64K bytes of the 256K bytes in L2 memory can be configured as mapped memory, cache, or combinations of the two. The remaining 192K bytes in L2 serves as mapped SRAM.
- The C6713B has a rich peripheral set that includes two Multichannel Audio Serial Ports (McASPs), two Multichannel Buffered Serial Ports (McBSPs), two Inter-Integrated Circuit (I2C) buses, one dedicated General-Purpose Input/Output (GPIO) module, two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM, SBSRAM, and asynchronous peripherals.
- The two McASP interface modules each support one transmit and one receive clock zone. Each of the McASP has eight serial data pins which can be individually allocated to any of the two zones. The serial port supports time-division multiplexing on each pin from 2 to 32 time slots. The C6713B has sufficient bandwidth to support all 16 serial data pins transmitting a 192 kHz stereo signal. Serial data in each zone may be transmitted and received on multiple serial data pins simultaneously and formatted in a multitude of variations on the Philips Inter-IC Sound (I2S) format.
- In addition, the McASP transmitter may be programmed to output multiple S/PDIF, IEC60958, AES-3, CP-430 encoded data channels simultaneously, with a single RAM containing the full implementation of user data and channel status fields.
- The McASP also provides extensive error-checking and recovery features, such as the bad clock detection circuit for each high-frequency master clock which verifies that the master clock is within a programmed frequency range.
- The two I2C ports on the TMS320C6713B allow the DSP to easily control peripheral devices and communicate with a host processor. In addition, the standard multichannel buffered serial port (McBSP) may be used to communicate with serial peripheral interface (SPI) mode peripheral devices.
- The TMS320C6713B device has two bootmodes: from the HPI or from external asynchronous ROM. For more detailed information, see the _bootmode_ section of this data sheet.
- The TMS320C67x DSP generation is supported by the TI eXpressDSP set of industry benchmark development tools, including a highly optimizing C/C++ Compiler, the Code Composer Studio Integrated Development Environment (IDE), JTAG-based emulation and real-time debugging, and the DSP/BIOS kernel.
TMS320C6713BGDP300 Specifications
| Attribute | Attribute Value |
|---|---|
| Datasheet | Datasheet |
| 3D Model | 3D Model |
| Mounting Style | Surface Mount |
| Number of Pins | 272 Pin |
| Case/Package | BGA-272 |
| Frequency | 300 MHz |
| Supply Voltage (DC) | 1.33V (min) |
| Number of Positions | 272 Position |
| Clock Speed | 300 MHz |
| RAM Memory Size | 64 kB |
| Number of Bits | 64 Bit |
| Number of I/O Pins | 16 IO |
| Number of Inputs and Outputs | 16 Input IO |
| Operating Temperature (Max) | 90 ℃ |
| Operating Temperature (Min) | 0 ℃ |
| Show | |
| Size-Length | 28.05 mm |
| Size-Width | 28.05 mm |
| Size-Height | 1.6 mm |
| Operating Temperature | 0℃ ~ 90℃ |
| Product Lifecycle Status | Active |
| Packaging | Tray |
| RoHS | Non-Compliant |
| Lead-Free Status | Contains Lead |
| REACH SVHC Compliance | No SVHC |
| REACH SVHC Compliance Edition | 2015/06/15 |
| ECCN Code | 3A991.a.2 |
| HK STC License | NLR |
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- - Carefully inspected and packed by ManyChip warehouse - Vacuum packaging - Anti-static packaging - Shockproof foam
- The terms here are for reference only, the actual terms are subject to the sales quotation. - Please confirm product specifications when ordering. - MOQ refers to the minimum order quantity required to purchase each part. - If you have special ordering instructions, please indicate them on the ordering page. - Inspection (PSI) will be performed prior to shipment.
- - Income Quality Control (IQC), 1000+ qualified dealers. - Chips are tested by authoritative organizations to ensure the quality, authenticity and safety of your device. - Decapsulation control - X-ray control - XRF inspection - Electrical testing - Surface testing -Digital components warehouse, covering an area of 800 square meters, with constant temperature and humidity
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